I. Definition
As used herein, “III-Nitride” or “III-N” refers to a compound semiconductor that includes nitrogen and at least one group III element such as aluminum (Al), gallium (Ga), indium (In), and boron (B), and including but not limited to any of its alloys, such as aluminum gallium nitride (AlxGa(1-x)N), indium gallium nitride (InyGa(1-y)N), aluminum indium gallium nitride (AlxInyGa(1-x-y)N), gallium arsenide phosphide nitride (GaAsaPbN(1-a-b)), aluminum indium gallium arsenide phosphide nitride (AlxInyGa(1-x-y)AsaPbN(1-a-b), for example. III-N also refers generally to any polarity including but not limited to Ga-polar, N-polar, semi-polar, or non-polar crystal orientations. A III-N material may also include either the Wurtzitic, Zincblende, or mixed polytypes, and may include single-crystal, monocrystalline, polycrystalline, or amorphous structures. Gallium nitride or GaN, as used herein, refers to a III-N compound semiconductor wherein the group III element or elements include some or a substantial amount of gallium, but may also include other group III elements in addition to gallium. A III-N or a GaN transistor may also refer to a composite high voltage enhancement mode transistor that is formed by connecting the III-N or the GaN transistor in cascode with a lower voltage group IV transistor.
In addition, as used herein, the phrase “group IV” refers to a semiconductor that includes at least one group IV element such as silicon (Si), germanium (Ge), and carbon (C), and may also include compound semiconductors such as silicon germanium (SiGe) and silicon carbide (SiC), for example. Group IV also refers to semiconductor materials which include more than one layer of group IV elements, or doping of group IV elements to produce strained group IV materials, and may also include group IV based composite substrates such as single-crystal or polycrystalline SiC on silicon, silicon on insulator (SOI), separation by implantation of oxygen (SIMOX) process substrates, and silicon on sapphire (SOS), for example.
It is noted that, as used herein, the terms “low voltage” or “LV” in reference to a transistor or switch describes a transistor or switch with a voltage range of up to approximately fifty volts (50V). It is further noted that use of the term “midvoltage” or “MV” refers to a voltage range from approximately fifty volts to approximately two hundred volts (approximately 50V to 200V). Moreover, the term “high voltage” or “HV,” as used herein, refers to a voltage range from approximately two hundred volts to approximately twelve hundred volts (approximately 200V to 1200V), or higher.
II. Background Art
In high power and high performance circuit applications, group III-V field-effect transistors (FETs), such as gallium nitride (GaN) or other III-Nitride based high electron mobility transistors (HEMTs), are often desirable for their high efficiency and high-voltage operation. III-Nitride and other group III-V HEMTs operate using polarization fields to generate a two-dimensional electron gas (2DEG) allowing for high current densities with low resistive losses. Although their high breakdown voltage, high current density, and very low on-resistance render group III-V HEMTs potentially advantageous for use in power applications, III-Nitride and other group III-V HEMTs are susceptible to having their performance degraded due to charge trapping.
Charge trapping may result from the presence of trap sites residing in the various material layers used to fabricate the HEMT, as well as at interfaces between those layers. For example, trap sites may be found in or at the interface of the active barrier layer of the HEMT and an overlying dielectric or passivation layer. These trap sites can capture electrons, leading to full or partial electron depletion in the channel and can undesirably increase the on-resistance of the HEMT.